[1] B. Arambepola and S. Choomchuay, “Array Architectures for Reed-Solomon Decoding”, Proc. IEEE-ISCAS, Singapore, June, 1991, pp. 2963-2966. [2] S. Choomchuay and B. Arambepola, “An algorithm and a VLSI architecture for Reed-Solomon Decoding”, Proc. IEEE-ISCAS, San Diego, U.S.A., May, 1992, pp. 2120-2123. [3] B. Arambepola and S. Choomchuay, “ Algorithm and Architectures for Reed-Solomon Codes”, GEC Journal of Reseach, Vol. 9, No. 3. 1992, pp. 172-184. [4] B. Arambepola and S. Choomchuay, “Algorithms for Block Error Control Codes”, IEE Colloquium on DSP application in communication system, London, March, 1993, pp. 3/1-3/6. [5] S. Choomchuay and B. Arambepola, “Algorithms and Architectures for Time-domain Reed-Solomon Decoding”, IEE Proc.-I, Vol. 140, No. 3, June 1993, pp. 189-196. [6] S. Choomchuay et. al., “Developement of ECG Bed-side Monitor”, Regional Conference on Biomedical Electronics, Bundung, Indonesia, April, 1994, pp.246-250. [7] S. Choomchuay, “On the Implementation of Finite Field Operations”, Ladkrabang Engineering Journal, Vol. 11, No. 1, June 1994, pp. 7-16. [8] S. Choomchuay, “On the Implementation of Finite Field Basis Conversions”, EECON-17, King Mongkut's Institute of Technology, North Bangkok, 1994, pp. 482-486. [9] S. Chomchuay, “Fast Transform Techniques for RS Codes”, Ladkrabang Engineering Journal, Vol. 12, No. 1, June 1995, pp. 32-41. [10] S. Choomchuay, “Erasure Correction Techniques in R-S Decoding”, Jounal of King Monkut’s Institute of Technology Ladkrabang, Vol.3, No.2, September 1995, pp.23-30 [11] S. Choomchuay, “A Parallel Architecture for Reed-Solomon Decoding”, EECON-18, Mahanakorn Univ., November 1995, pp. 794-799. [12] P. Mai-Dee, S. Choomchuay, “A Prime Factor Algorithm for Finite Field Fast Transform”, Ladkrabang Engineering Journal, Vol. 13, No. 1, July 1996, pp. 62-71. (in Thai) [13] M.Sangworasil, S. Choomchuay, P. Koosirivanichakorn, S. Tritriluxana, “A Linear Approach in Vector Quantisation”, Regional Symposium on Telecommunications Electronics Circuits and Systems (RESTEC ‘96), KMITL, July 1996, pp. C-45 - C-48. [14] P. Mai-Dee, S. Choomchuay,“Hardware Structure of A Prime factor Finite Field Transform”, EECON-19, Khon-Khan University, November 1996, pp. CP-27 - CP-32. (in Thai) [15] P. Mai-Dee, S. Choomchuay, “Grobner Basis With Queue Approach to Solve Welch-Berlekamp Equation”, 7th Int. Symposium on IC Tech., Sys. and Apps. (ISIC-97), Singapore, September 1997, pp. 573-575 [16] P. Mai-Dee, S. Choomchuay, “The Grobner Basis Architecture for Solving Welch-Berlekamp Equation”, IASTED Int. Conf. On Signal and Image processing (SIP-97), New Orleans USA, December 1997, pp. 263-266. [17] P. Mai-Dee, S. Choomchuay, “Algebraic Geometry Code Decoding Based on Chinese Remainder Theorem”, 1998 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS-98), Chiangmai, Thailand, November 1998, pp. TP2-4.1 - TP2-4.4. [18] P. Mai-Dee, S. Choomchuay, “Invisible Edge and Soft Tied in Compaction Strategy”, 1998 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS-98), Chiangmai, Thailand, November 1998, pp. WT33-2.1 - WT33-2.4. [19] A Yodtein, S. Choomchuay, “An Efficient Algorithm for VLSI Circuit Partitioning” 9th Int. Symposium on IC Tech., Sys. and Apps. (ISIC-99), Singapore, September 1999. [20] M. Hirata, Y. Suzuki, M. Yoshida, Y. Arayashiki, M. Teramoto and S. Choomchuay, “A New Same-Bias Voltage Generator for TFT-LCD’s Drive”, 6th International Display Workshop (IDW-99), Sendai, Japan December 1999. (Best Paper Award) [21] A Yodtein, S. Choomchuay, “An Improved Simulated Annealing Algorithm for Circuit Partitioning” Int. Symposium on Intelligent Signal Processing and Communication Systems. (ISPACS ‘99), Phuket, Thailand, December 1999. [22] S. Choomchuay, Y. Suzuki, M. Yoshida, Y. Arayashiki and M. Teramoto “A High-Voltage Generator using CMOS Charge Pump” Int. Symposium on Intelligent Signal Processing and Communication Systems (ISPACS ‘99), Phuket, Thailand, December 1999. [23] M. Hirata, Y. Susuki, M. Yoshida, Y. Arayashiki, M. Teramoto, and S. Choomchuay, “New Bias Voltage Generator for TFT-LCD’s Drivers”, IEICE Trans. Electron., Vol. E-83C, No. 10, October 2000, pp.1579-1583. [24] P. Mai-Dee and S. Choomchuay, “A Wave-Domino Pipelining By Using Common Clock” Int. Symposium on Intelligent Signal Processing and Communication Systems. (ISPACS ‘2000), Hawaii, USA, November 2000, pp.180 - 183. [25] B.Sansoda, S. Choomchuay and Y. Susuki, “Comparative Study & Experiment of Various Methods for High-Voltage Generator”, EECON-23, Chiang Mai Univ., November 2000. [26] B.Sansoda, S. Choomchuay and Y.Susuki, “An On Chip Negative High-Voltage Generator”, 2000 Asia-Pacific Symposium on Broadcasting and Communications (APSBC-2000), KMITL, Bangkok, Thailand, December 2000, pp.74-77. [27] P. Mai-Dee and S. Choomchuay, “Compactivity Improvement Using Slack Adjustment Technique,” Int. Symposium on Communication and Information Technology, (ISCIT 2001), ChiangMai, Thailand, November 2001, pp.231 - 234. [28] K. Southysombath, P. Indarack, P. Chantamaly, M. Mangnomek, S. Ikeda,
W. Phromphanich, S. Choomchuay, Y. Nakajima, and M. Moriya, “Problem in Propagation on Thai Television Received in Laos,” Int. Symposium on Communication and Information Technology, (ISCIT 2001), ChiangMai, Thailand, November 2001, pp.546 - 549. [29] S. Pongyupinpanich and S.Choomchuay, "Composite Field Bit Serial-Parallel Multiplier", Proc. of Information and Computer Engineering Workshop 2002 (ICEP2002), Prince of Songkla University, January 2002, pp.65-69 [30] S. Choomchuay, P. Pongyupinpanich and K. Hadkhuntod, “An On-chip Data Storage With ElGamal Elliptic Curves Cryptosystem,” Int. Symposium on Communication and Information Technology, (ISCIT 2002), Pattaya, Thailand, October 2002, pp.423 - 426. [31] S. Pongyupinpanich, S.Choomchuay and K. Hadkhuntod, “An Application of ELGamal Elliptic Curves Cryptosystems in Smart Card,” EECON-25, Prince of Songkla University, November 2002, pp.46-50. [32] S. Timakul and S.Choomchuay, "A Bit-Serial Architecture for a Multiplierless DCT," Proc. of Information and Computer Engineering Workshop 2003 (ICEP2003), Prince of Songkla University, January 2003, pp.178-182. (Best paper Award) [33] S.Choomchuay and S. Timakul, "A Bit-Serial Architecture for a Multiplierless DCT," Journal of ICT, 2(1), University UUM, Malaysia, July 2003, pp. 15-30. [34] S. Timakul, S. Chuntree, and S. Choomchuay, “A Low Complexity Implementation of a Fast BinDCT,” Int. Symposium on Communication and Information Technology, (ISCIT 2003), Songkla, Thailand, September 2003, pp.799-802. [35] S. Timakul, W. Pengchan, S. Niumchareon , A. Reungpanich, P. Siamchai, K. Imai, and S. Choomchuay, "An Investigation of Digital Circuit Fabrication on 5 um Poly-Gate CMOS Process," EECON-26, King Mongkut's Institute of Technology, North Bangkok, November 2003, pp. 1303-1308. [36] S. Chuntree and S. Choomchuay, "A Bit-Parallel Pipelined Multiplierless DCT," EECON-26, King Mongkut's Institute of Technology, North Bangkok, November 2003, pp. 1173-1178. [37] P. Noo-intara, S. Chantarawong, and S. Choomchuay, "Architectures for MixColumn Transform for the AES," Proc. of Information and Computer Engineering Workshop 2004 (ICEP2004), Prince of Songkla University (Phuket Campus), January 2004, pp.152-156. [38] S. Chantarawong, P. Noo-intara, and S. Choomchuay, "An Architecture for S-Box Computation in the AES," Proc. of Information and Computer Engineering Workshop 2004 (ICEP2004), Prince of Songkla University (Phuket Campus), January 2004, pp.157-162. (Best paper Award) [39] S. Chantarawong and S. Choomchuay, "An Architecture for a compact AES System," Proc. of Electrical Eng./Electronics, Communications, Computer and Information Technology Conference 2004 (ECTI-CON2004), ECTI Association, Thailand, May 2004, pp. 121-124. [40] S. Pongyupinpanich and S. Choomchuay, "An Architecture for a SHA-1 Applied for DSA," Proc. of Electrical Eng./Electronics, Communications, Computer and Information Technology Conference 2004 (ECTI-CON2004), ECTI Association, Thailand, May 2004, pp. 133-136. [41] S. Pongyupinpanich, P. Noo-intara, and S. Choomchuay, "SHA-1 With On The Fly Round-Word Computation," Proc. of Electrical Eng./Electronics, Communications, Computer and Information Technology Conference 2004 (ECTI-CON2004), ECTI Association, Thailand, May 2004, pp. 137-140. [42] S. Choomchuay and S. Pongyupinpanich, "An Architecture for a SHA-1 Applied for DSA," Proc. of AMOC-2004 Asian International Mobile Computing Conference 2004 (AMOC-2004), Thailand, May 2004, pp. 8-12. [43] S. Pongyupinpanich, S. Phathumvanh, and S. Choomchuay, “A 32 Bits Architecture for an AES System,” IEEE Int. Symposium on Communications and Information Technologies, (ISCIT 2004), Sapporo, Japan, October 2004, pp.70-73. [44] S. Timakul and S. Choomchuay, "Near True DCT Binary Approximation for JPEG," EECON-27, Khon Khen University, November 2004, Vol. 2, pp. 205-208. [45] S. Choomchuay, S. Pongyupinpanich, and S. Phathumvanh, “A Compact 32-bit Architecture for an AES System,” ECTI Trans. Computer and Information Technology, Vol. 1, No. 1, May 2005, pp.24-29. [46] Chirawat Temi, Somsak Choomchuay, and Attasit Larsakul, “A Robust Image Watermarking Using Multiresolution Analysis of Wavelet,” IEEE Int. Symposium on Communications and Information Technologies, (ISCIT 2005), Beijing, China, October 2005, pp.603-606. [47] Saykhong Saynasine, Susumu Ikeda, and Somsak Choomchuay, “Status and Trend of ICT in Lao PDR,” Proc. of Electrical Eng./Electronics, Communications, Computer and Information Technology Conference 2004 (ECTI-CON2006), ECTI Association, Thailand, May 2006, pp. 137-140. [48] Atipat Julasayvake and Somsak Choomchuay, "A Combined Technique in Fingerprint Core Point detection," Proc. of International Workshop on Advanced Image Technology 2007 (IWAIT-2007), Thailand, January 2007, pp. 556-560. [49] Atipat Julasayvake and Somsak Choomchuay, "AN ALGORITHM FOR Fingerprint Core Point detection," Proc. of International Symposium on Signal Processing and its Applications 2007 (ISSPA-2007), United Arab Emirates, February 2007 [50] Atipat Julasayvake and Somsak Choomchuay, "SINGULARITIES-BASED FINGERPRINT CLASSIFICATION," Proc. of PSU-UNS Conference on Engineering and Environment 2007 (ICEE-2007), Phuket, Thailand, May 2007. |
